General Description

Introduction

This section gives a short introduction of the new TDC Electronics concept for the bulk MuSR experiments.

The new electronics consists of a VME crate with programmable constant fraction discriminators ( PSI CFD950 ), a multihit TDC ( CAEN V1190 ) for digitizing of time information, and a scaler module ( SIS3820 ) for rate measurements.

The VME frontend process for readout of the VME TDC data is running on a front-end Linux PC and connected to the VME crate by a SIS 1100/3100 VME-PCI interface. (in the future, the VME readout could be performed by a SHARC processor that is an option of the SIS3100 VME card).

The complete event evaluation is done in software: the TDC is operated in Continuous Storage Mode, and the frontend process reads all the TDC data. It searches for events that fulfill logics conditions. The data are sent to the Analyzer process running on the Backend, which builds the histograms taking into account post- and pre-pilup conditions, as well as logics conditions.

The system is also characterized by its flexibility, as the whole logic diagram is simply stored in special setup files, which can be easily modified and loaded for a desired configuration into the online database (ODB) of the MIDAS DAQ system.

Layout

The following figure represents schematically the different modules used in the VME crate.
The analog signals are split by an active signal divider (SP950) into a timing branch sent to the CFD (CFD950 with 8 input channels) and a monitoring branch for CFD threshold adjustment (see section Threshold). Note that as long as the old pTA electronics is still active, one of the splitted analog signals is directed to the old ORTEC CFD935 modules instead of being used for monitoring.

Schematics_2.png

Schematics of a typical VME elctronic crate for a bulk muSR experiment. In additon to the CFDs, TDC, Scaler and VME/PCI interface, the crate is usually also equipped with a PSI Clock (CD950). Also NIM/ECL PSI converters (LC950) and Coincidence Units can be installed.



The signals from the CFD's are sent as ECL signals to the TDC V1190 and also to the scaler. If hardware coincidence is necessary, the ECL or NIM signal outputs of the CFD can be used with a PSI Coincidence Unit FC950 (available from Studio E). The signal can be fed back to the TDC and Scaler by the ECL output of the Coincidence Unit.

The signals from the TDC and Scaler are sent to a MIDAS frontend (Linux PC) through the optical link VME/PCI interface. In the front-end Linux PC, the events are checked for coincidence conditions and are sent to the Analyzer process running on the Backend computer, where the histograms are built according to the trigger and logics conditions defined for a particular setup.

Note that for all the modules developped at PSI, a RS485 connection is available. It allows to setup the module with the MSCB (MIDAS Slow Control Bus) protocol through a MSCB submaster (connecting the RS485 bus to the ethernet). Those settings are saved on flash memory on the boards.

More Information

The following Chapters provide information on how to setup the electronics: